NAND Flash's status in embedded systems is similar to that of hard disks on PCs. It is used to save the operating system, applications, user data, and all kinds of data generated during the operation of the system, and the data will not be lost after the system is powered off.
Several important basic features of Nand Flash:
a.NandFlash's IO interface
For storage devices such as Norflash and DRAM, the CPU can directly access it through the address bus, while Nand Flash does not have such a bus, only IO interface, and can only send commands and addresses through the multiplexed IO interface, so as to achieve access to the internal data of Nand Flash. (Port multiplexing)
b. NandFlash read, write and erase operations:
Reads and writes are per page, and erasure is per block.
For Nand writes, only 1 can be changed from 0, not 0 to 1. So you must first perform the erase operation on nand, that is, 0 into 1, and then write (make the corresponding 1 become 0)
c. The data stored in Nand is prone to errors, so it is necessary to adopt certain algorithms to encode and decode the data. Encode before data is stored in NAND Flash and stored in NAND along with validation data; Decode the data after it is read from NAND to verify that the data is not error-free. （BCH）
Second, the noun terms related to Nand Flash:
1. ONFI standards
The ONFI (Open NAND Flash Interface) specification is a standard for Flash flash interfaces, which is Intel's standard for unifying the chaotic flash interface. Because before that, none of the NAND flash chips sold on the market were identical in pin definitions. This makes it possible that a controller designed for one company cannot be used in another company's product. For example, the controller designed for Toshiba chip cannot be used in Samsung or hynix products, which brings great difficulties to upstream master designers and final product designers.
To this end, Intel has developed ONFI standards with a number of NAND Flash manufacturers to unify the pin definition of NAND Flash chips, and use new technologies to achieve new functions on this basis.
2. Block Management
Due to its physical characteristics, NandFlash only has a limited number of erases, and beyond that number, it is basically broken. In the process of use, some Nand Flash blocks will be used badly, and when found, this block should be marked as a bad block in time and no longer used. The management work related to this is part of the bad block management of NAND Flash.
3. Wear-Leveling load balancing
The management of NandFlash's blocks also includes load balancing.
It is precisely because the block of Nand Flash has a certain life limit, so if you erase and then write data to the same block every time, then the block is easy to be used, so we have to manage it, so many times of the same block operations, evenly distributed to some other blocks, so that the use of blocks, relatively average, so that relatively speaking, can make full use of Nand Flash.
4. ECC error checksum
The physical characteristics of NandFlash make a certain number of errors occur in the process of reading and writing data, so there must be a corresponding error detection and correction mechanism, so there is this ECC for the detection and correction of data errors. Nand Flash's ECC, common algorithms are hemming code and BCH, the implementation of such algorithms, can be software or hardware. Different systems, according to their own needs, use the corresponding software or hardware.
5. SLC and MLC
SLC(Single Level Cell)
A single storage unit that stores only one bit of data, representing 1 or 0.
For the representation of data, the voltage of the charge stored inside a single memory cell, compared with a specific threshold voltage Vth, if it is greater than this Vth value, it means 1, and conversely, less than Vth, it means 0.
MLC(Multi Level Cell)
The counterpart to SLC is a single memory cell, which can store multiple bits, such as 2 bits, 4 bits, etc. Its implementation mechanism is relatively simple to say,
It is by controlling the amount of internal charge, divided into multiple thresholds, and by controlling the amount of charge inside, to achieve the storage of different data we need. For example, assuming that the input voltage is Vin=4V (there is no such voltage in fact, here is just for the convenience of examples), then, you can design 2 to the power of 2 = 4 thresholds, 1/4 of Vin=1V, 2/4 of Vin=2V, 3/4 of Vin=3V, Vin=4V, respectively, representing 2 bits of data 00, 01, 10, 11, for writing data, it is charging, by controlling the amount of internal charge, corresponding to different data.
Third, Nand Flash data storage:
NAND flash data is saved in bits; For SLC, a cell can only store one bit, while for MLC, a cell can store 2 bits; These cells are connected in units of 8 or 16 to form bit lines, forming the so-called byte(x8)/word(x16), which is the bit width of what we call a NAND device.
NAND flash reads and writes data in pages (described later) and erases data in blocks.
